Chip package structure having a shielded molding compound
US9412703B1 · kind B1 · utility
2Cited by
7References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2015 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Feb 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip package structure including a main substrate, a carrier substrate, at least a chip, a molding compound, a shielding layer and a plurality of connection structures between the main substrate and the carrier substrate. The shielding layer covers the top surface and the sidewalls of the molding compound and a portion of the carrier substrate. The shielding layer is electrically grounded through the connection structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.