Vertical semiconductor device having semiconductor mesas with side walls and a PN-junction extending between the side walls
US9412827B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2015 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Oct 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A vertical semiconductor device includes a semiconductor body having a backside and extending, in a peripheral area and in a vertical direction substantially perpendicular to the backside, from the backside to a first surface of the semiconductor body, the body including in an active area spaced apart semiconductor mesas extending, in the vertical direction, from the first surface to a main surface arranged above the first surface, in a vertical cross-section the peripheral area extending between the active area and an edge that extends between the back-side and the first surface, in the vertical cross-section each of the mesas including first and second side walls, a first pn-junction extending between the first and second side walls, and a conductive region in Ohmic contact with the mesa and extending from the main surface into the mesa. Gate electrodes are arranged between adjacent mesas and extend across the first pn-junctions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.