Method for embedded diamond-shaped stress element
US9412843B2 · kind B2 · utility
3Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 23, 2014 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Jun 20, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device with an embedded layer, by anisotropically etching a substrate adjacent to an already formed gate structure. A dummy layer is deposited in the previously etched region, and a second spacer is formed next to the first spacer. The dummy layer is removed, and a second anisotropic etch is performed. A semiconductor substrate is then epitaxially grown in the etched out region to form the embedded layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.