Resistive memory cell with bottom electrode having a sloped side wall
US9412942B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2014 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Feb 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
A method of forming a resistive memory cell, e.g., a CBRAM or ReRAM cell, may include: forming a plurality of bottom electrode connections, depositing a bottom electrode layer over the bottom electrode connections, performing a first etch to remove portions of the bottom electrode layer such that the remaining bottom electrode layer defines at least one sloped surface, forming an oxidation layer on each sloped surface of the remaining bottom electrode layer, performing a second etch on the remaining bottom electrode layer and oxidation layer on each sloped surface to define at least one upwardly-pointing bottom electrode region above each bottom electrode connection, each upwardly-pointing bottom electrode region defining a bottom electrode tip, and forming an electrolyte region and a top electrode over each bottom electrode tip such that the electrolyte region is arranged between the top electrode and the respective bottom electrode top.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.