Method for managing the operation of a circuit with triple modular redundancy and associated device
US9417282B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2015 |
| Grant date | Aug 16, 2016 |
| Priority date | — |
| Expiry date | Apr 15, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/183
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for managing operation of a logic component is provided, with the logic component including a majority vote circuit and an odd number of flip-flops equal to at least three. The method includes, following a normal operating mode of the logic component, placing a flip-flop in a test mode, and injecting a test signal into a test input of the flip-flop being tested while a logic state of the other flip-flops is frozen. A test signal output is analyzed. At the end of the test, the logic component is placed back in the normal operating mode. The majority vote circuit restores a value of the output signal from the logic component that existed prior to initiation of the test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.