Decryption systems and related methods for on-the-fly decryption within integrated circuits
US9418246B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2014 |
| Grant date | Aug 16, 2016 |
| Priority date | — |
| Expiry date | Dec 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0637
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Methods and systems are disclosed for on-the-fly decryption within an integrated circuit that adds zero additional cycles of latency within the overall decryption system performance. A decryption system within a processing system integrated circuit generates an encrypted counter value using an address while encrypted code associated with an encrypted software image is being obtained from an external memory using the address. The decryption system then uses the encrypted counter value to decrypt the encrypted code and to output decrypted code that can be further processed. A secret key and an encryption engine can be used to generate the encrypted counter value, and an exclusive-OR logic block can process the encrypted counter value and the encrypted code to generate the decrypted code. By pre-generating the encrypted counter value, additional cycle latency is avoided. Other similar data independent encryption/decryption techniques can also be used such as output feedback encryption/decryption modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.