Tamper detector with hardware-based random number generator
US9418250B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 23, 2014 |
| Grant date | Aug 16, 2016 |
| Priority date | — |
| Expiry date | Oct 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/58
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a tamper detector that includes a linear feedback shift register (LFSR) for generating pseudorandom coded detection signals as a function of seed values and a generator polynomial. The generator polynomial is loaded from a controller to the LFSR via software, and the seed values are directly loaded from a hardware-based random number generator to the LFSR. The tamper detector has output and input elements for connection to ends of a tamper detection circuit, wherein the detection circuit is linked with a physical closure surrounding an electronic circuit. The detection signals are applied to the output element and incoming signals are received from the tamper detection circuit at a comparator via the input element. Comparison of the incoming signals with the coded detection signals is performed to detect interference with the detection circuit in an attempt to tamper with the electronic circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.