Integrated circuit with on-die decoupling capacitors
US9418873B2 · kind B2 · utility
1Cited by
2References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2014 |
| Grant date | Aug 16, 2016 |
| Priority date | — |
| Expiry date | Aug 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has an on-die decoupling capacitor that is shared between alternative high-speed interfaces. A capacitance pad is connected to the decoupling capacitor and internal connection pads are connected respectively to the alternative interfaces. Internal connection bond wires connect the decoupling capacitor to the selected interface through the capacitance pad and the internal connection pads in the same process as connecting the die to external electrical contacts of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.