Transistor, semiconductor device and method of manufacturing the same
US9418892B2 · kind B2 · utility
0Cited by
0References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2016 |
| Grant date | Aug 16, 2016 |
| Priority date | — |
| Expiry date | Mar 18, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/679
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a central region, side regions located in both sides of the central region, and conductive layers including a first barrier pattern formed in the central region, a material pattern formed in the first barrier pattern and having an etch selectivity with respect to the first barrier pattern, and a second barrier pattern formed in the material pattern; and insulating layers alternately stacked with the conductive layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.