Image sensor pixel having storage gate implant with gradient profile
US9419044B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2014 |
| Grant date | Aug 16, 2016 |
| Priority date | — |
| Expiry date | Apr 28, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/80373
Abstract
A pixel cell includes a storage transistor disposed in a semiconductor substrate. The storage transistor includes a storage gate disposed over the semiconductor substrate, and a storage gate implant that is annealed and has a gradient profile in the semiconductor substrate under the storage transistor gate to store image charge accumulated by a photodiode disposed in the semiconductor substrate. A transfer transistor is disposed in the semiconductor substrate and is coupled between the photodiode and an input of the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor. The transfer transistor includes a transfer gate disposed over the semiconductor substrate. An output transistor is coupled to an output of the storage transistor to selectively transfer the image charge from the storage transistor to a read out node. The output transistor includes an output gate disposed over the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.