Semiconductor structure and method for manufacturing the same
US9419108B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2012 |
| Grant date | Aug 16, 2016 |
| Priority date | — |
| Expiry date | Aug 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6215
Abstract
One embodiment of present invention provides a method for manufacturing a semiconductor structure, which comprises: forming a gate stack on a semiconductor substrate and removing parts of the substrates situated on two sides of the gate stack; forming sidewall spacers on sidewalls of the gate stack and on sidewalls of the part of the substrate under the gate stack; forming doped regions in parts of the substrate on two sides of the gate stack, and forming a first dielectric layer to cover the entire semiconductor structure; selectively removing parts of the gate stack and parts of the first dielectric layer to form a channel region opening and source/drain region openings; forming a high K dielectric layer on sidewalls of the channel region opening; and implementing epitaxy process to form a continuous fin structure that spans across the channel region opening and the source/drain region openings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.