Patent · US Active

Method and apparatus for transitioning a system to an active disconnect state

US9423847B2 · kind B2 · utility

2Cited by
1References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 20, 2011
Grant dateAug 23, 2016
Priority date
Expiry dateDec 23, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F1/3206
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A processor includes a processor core and a power management controller operable to receive a timer event, store the timer event, generate a hardware system sleep command to enter a hardware system sleep state, and restore the timer event upon exiting from the hardware system sleep state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.