System, apparatus and method for translating vector instructions
US9424042B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 6, 2011 |
| Grant date | Aug 23, 2016 |
| Priority date | — |
| Expiry date | Apr 27, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30174
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Vector translation instructions are used to demarcate the beginning and the end of a code region to be translated. The code region includes a first set of vector instructions defined in an instruction set of a source processor. A processor receives the vector translation instructions and the demarcated code region, and translates the code region into translated code. The translated code includes a second set of vector instructions defined in an instruction set of a target processor. The translated code is executed by the target processor to produce a result value, the result value being the same as an original result value produced by the source processor executing the code region. The target processor stores the result value at a location that is not a vector register, the location being the same as an original location used by the source processor to store the original result value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.