Inventor · Hillsboro, OR, US

Ruchira Sasanka

21Patents
4h-index
26Co-inventors
59Inventor score

Filing activity: Dec 25, 2010 → Mar 26, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US9189233B2 Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads Physics 12 Active
US10162758B2 Opportunistic increase of ways in memory-side cache Physics 9 Active
US9672019B2 Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads Physics 6 Active
US9880842B2 Using control flow data structures to direct and track instruction execution Physics 6 Active
US10725755B2 Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads Physics 3 Active
US9323528B2 Method, apparatus, system creating, executing and terminating mini-threads Physics 3 Active
US9558006B2 Continuous automatic tuning of code regions Emerging Cross-Sectional Technologies 2 Active
US9424042B2 System, apparatus and method for translating vector instructions Physics 1 Active
US10901899B2 Reducing conflicts in direct mapped caches Physics 1 Active
US9170789B2 Analyzing potential benefits of vectorization Physics 1 Active
US10152421B2 Instruction and logic for cache control operations Physics 1 Active
US10296457B2 Reducing conflicts in direct mapped caches Physics 1 Active
US9772678B2 Utilization of processor capacity at low operating frequencies Emerging Cross-Sectional Technologies 1 Active
US9904555B2 Method, apparatus, system for continuous automatic tuning of code regions Emerging Cross-Sectional Technologies 1 Active
US9361234B2 Utilization of processor capacity at low operating frequencies Emerging Cross-Sectional Technologies 0 Active
US12124371B2 Apparatus and method to reduce bandwidth and latency overheads of probabilistic caches Physics 0 Active
US9811464B2 Apparatus and method for considering spatial locality in loading data elements for execution Physics 0 Active
US10599573B2 Opportunistic increase of ways in memory-side cache Physics 0 Active
US10684833B2 Post-compile cache blocking analyzer Physics 0 Active
US9256276B2 Utilization of processor capacity at low operating frequencies Emerging Cross-Sectional Technologies 0 Active
US10379827B2 Automatic identification and generation of non-temporal store and load operations in a dynamic optimization environment Emerging Cross-Sectional Technologies 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.