Patent · US Active

Error-tolerant memories

US9424124B2 · kind B2 · utility

2Cited by

2References

22Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Georg Georgakos · Fraunberg, DE
Michael Goessel · Roter Dudel, DE
Egor Sogomonyan · Kashkhatau, RU

Key dates

Filing date	Jun 10, 2013
Grant date	Aug 23, 2016
Priority date	—
Expiry date	May 27, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH03K19/23
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Methods and apparatuses relating to error-tolerant memories are provided. In one example embodiment, output signals from at least three memory devices are supplied to an error correction device. The error correction device outputs a corrected data value in such a manner that, when the read data values match, this data value is output and, in at least one state in which the data values do not match, a previously output data value is retained.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.