Patent · US Active

Processing system with interspersed processors DMA-FIFO

US9424213B2 · kind B2 · utility

2Cited by

8References

14Claims

0Family size

Assignee

Coherent Logix, Incorporated · US

Inventors

Carl S. Dobbs · Austin, US
Michael R. Trocino · Austin, US
Keith M. Bindloss · Irvine, US

Key dates

Filing date	Mar 8, 2013
Grant date	Aug 23, 2016
Priority date	—
Expiry date	Oct 20, 2033

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments of a multi-processor array are disclosed that may include a plurality of processors, local memories, configurable communication elements, and direct memory access (DMA) engines, and a DMA controller. Each processor may be coupled to one of the local memories, and the plurality of processors, local memories, and configurable communication elements may be coupled together in an interspersed arrangement. The DMA controller may be configured to control the operation of the plurality of DMA engines.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.