Method for forming an air gap around a through-silicon via
US9425127B2 · kind B2 · utility
5Cited by
2References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2014 |
| Grant date | Aug 23, 2016 |
| Priority date | — |
| Expiry date | Dec 10, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices with air gaps around the through-silicon via are formed. Embodiments include forming a first cavity in a substrate, filling the first cavity with a sacrificial material, forming a second cavity in the substrate, through the sacrificial material, by removing a portion of the sacrificial material and a portion of the substrate below the sacrificial material, filling the second cavity with a conductive material, removing a remaining portion of the sacrificial material to form an air gap between the conductive material and the substrate, and forming a cap over the air gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.