Package with multiple I/O side-solderable terminals
US9425130B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2014 |
| Grant date | Aug 23, 2016 |
| Priority date | — |
| Expiry date | Jan 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Consistent with an example embodiment, there is leadless packaged semiconductor device having top and bottom opposing major surfaces and sidewalls extending there between. The leadless packaged semiconductor device comprises a lead frame sub-assembly having an array of two or more lead frame portions each having a semiconductor die arranged thereon. There are at least five I/O terminals wherein each of said terminals comprise a respective metal side pad wherein the respective metal side pad is disposed in a recess. A feature of this embodiment is that the each of the side pads is electroplated. The electroplated side pads accept solder and the solder menisci are contained by the recesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.