Semiconductor device and manufacturing method thereof
US9425313B1 · kind B1 · utility
10Cited by
15References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2015 |
| Grant date | Aug 23, 2016 |
| Priority date | — |
| Expiry date | Jul 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/751
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method for manufacturing a semiconductor device, a fin structure including a first semiconductor layer, an oxide layer disposed over the first semiconductor layer and a second semiconductor layer disposed over the oxide layer is formed. An isolation insulating layer is formed so that the second semiconductor layer of the fin structure protrudes from the isolation insulating layer while the oxide layer and the first semiconductor layer are embedded in the isolation insulating layer. A third semiconductor layer is formed on the exposed second semiconductor layer so as to form a channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.