RRAM cell structure with laterally offset BEVA/TEVA

US9425392B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Chih-Yang Chang · 員林市, TW
• Wen-Ting Chu
• Kuo-Chi Tu · Baoshan, TW
• Yu-Wen Liao · New Taipei, TW
• Hsia-Wei Chen · Taipei, TW
• Chin-Chieh Yang · New Taipei, TW
• Sheng-Hung Shih · Hsinchu, TW
• Wen-Chun You · Zilongting, TW

Key dates

• Filing date: Jul 20, 2015
• Grant date: Aug 23, 2016
• Expiry date: Jul 20, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8845

Abstract

The present disclosure relates to a method of forming a resistive random access memory (RRAM) cell. The method forms a bottom electrode over a bottom electrode via. The method further forms a variable resistive dielectric layer over the bottom electrode, and a top electrode over the variable resistive dielectric layer. The method forms a top electrode via vertically extending outward from an upper surface of the top electrode at a position centered along a first axis that is laterally offset from a second axis centered upon the bottom electrode via. The top electrode via has a smaller width than the top electrode. Laterally offsetting the top electrode via from the bottom electrode via provides the top electrode via with good contact resistance.