Circuit having a non-symmetrical layout
US9431066B1 · kind B1 · utility
5Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2015 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Mar 16, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit comprises a first voltage line, a second voltage line parallel to the first voltage line, and a bit line between the first voltage line and the second voltage line. The bit line is separated from the first voltage line by a minimum distance allowed by a design rule. The bit line is closer to the first voltage line than to the second voltage line. A first capacitance value between the bit line and the first voltage line is different than a second capacitance value between the bit line and the second voltage line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.