Method of forming a semiconductor package
US9431367B2 · kind B2 · utility
15Cited by
4References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2014 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Oct 1, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor package includes forming an interconnecting structure on an adhesive layer, wherein the adhesive layer is on a carrier. The method further includes placing a semiconductor die on a surface of the interconnecting structure. The method further includes placing a package structure on the surface of the interconnecting structure, wherein the semiconductor die fits in a space between the interconnecting structure and the package structure. The method further includes performing a reflow to bond the package structure to the interconnecting structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.