Semiconductor device having buried bit line and method for fabricating the same
US9431402B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2012 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Nov 13, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/63
Abstract
A method for fabricating a semiconductor device includes: forming an insulation layer over a semiconductor substrate; forming a first conductive layer over the insulation layer; forming a plurality of buried bit lines and insulation layer patterns isolated by a plurality of trenches, wherein the plurality of trenches are formed by etching the first conductive layer and the insulation layer; forming a sacrificial layer to gap-fill the trenches; forming a second conductive layer over the buried bit lines and the sacrificial layer; and forming a plurality of pillars over each of the buried bit lines by etching the second conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.