Integrated circuit device and method therefor
US9435862B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2014 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Jan 7, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31727
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit device comprising at least one self-test component arranged to execute self-testing within at least one self-test structure during a self-test execution phase of the IC device, and at least one clock control component arranged to provide at least one clock signal to the at least one self-test component at least during the self-test execution phase of the IC device. The at least one clock control component is further arranged to receive at least one indication of at least one power dissipation parameter for at least a part of the IC device, and modulate the at least one clock signal provided to the at least one self-test component based at least partly on the received at least one power dissipation parameter for at least a part of the IC device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.