Patent · US Active

Margin tool for double data rate memory systems

US9437326B2 · kind B2 · utility

7Cited by
3References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 12, 2014
Grant dateSep 6, 2016
Priority date
Expiry dateJun 12, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C7/22
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A tool for testing a double data rate (“DDR”) memory controller to ensure that data strobe transitions are aligned with data eyes to achieve a desired data integrity during data transfers between the memory controller and the memories. After the memory controller completes its training sequence during the initialization process, the tool sweeps the data strobe transition across the data eye. At each timing step during the sweep, several tests may be conducted to check for integrity of functionality. The tool thus generates a pass/fail margin table. The locations of the data strobe transitions selected by the memory controller during its previously run training sequence are then added to this tool-generated margin table. The result is essentially a pseudo data eye, reconstructed including the data strobe transition with the data eye. An inspection of the location of the data strobe transition with the data eye may be utilized to show the range of timing steps available before the data strobe transition would fail to capture valid data from the incoming data eye.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.