Chip package and method for manufacturing the same
US9437548B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2015 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Jun 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various embodiments provide a chip package. The chip package may include a metallic chip carrier; at least one chip carried by the metallic chip carrier; encapsulation material encapsulating the at least one chip and the metallic chip carrier; and a plurality of redistribution layers disposed over the at least one chip opposite the metallic chip carrier, wherein at least one redistribution layer of the plurality of redistribution layers is electrically coupled with the at least one chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.