Integrated circuit devices with counter-doped conductive gates
US9437701B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2014 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Oct 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/856
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuit devices with counter-doped conductive gates. The devices have a semiconductor substrate that has a substrate surface. The devices also have a first well of a first conductivity type, a source of a second conductivity type, and a drain of the second conductivity type. A channel extends between the source and the drain. A conductive gate extends across the channel. The conductive gate includes a first gate region and a second gate region of the second conductivity type and a third gate region of the first conductivity type. The third gate region extends between the first and second gate regions. The devices further include a gate dielectric that extends between the conductive gate and the substrate and also include a silicide region in electrical communication with the first, second, and third gate regions. The methods include methods of manufacturing the devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.