Semiconductor devices employing a data inversion scheme for improved input/output characteristics
US9438210B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 24, 2015 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Jul 24, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/106
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device may include a data output circuit and a control signal output circuit. The data output circuit may compare a first input signal or a second input signal with a storage datum to generate a first comparison selection signal and may compare the first input signal with the second input signal to generate a second comparison selection signal. The control signal output circuit may detect logic levels of bits included in the first and second comparison selection signals to generate first and second detection signals, generate first and second flag signals from the first and second detection signals in response to a storage flag signal, and sequentially output the first and second flag signals as transmission control signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.