Method for manufacturing printed circuit board
US9439282B2 · kind B2 · utility
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13Claims
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Inventor
Key dates
| Filing date | Jul 24, 2013 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Dec 9, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09127
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A printed circuit board includes a first trace layer, a first dielectric layer, a second trace layer, a second dielectric layer, a third trace layer, a third dielectric layer and a fourth trace layer arranged in that order. A cavity is defined in the printed circuit board running through from the fourth trace layer to the second dielectric layer. Portion of the second dielectric layer is exposed in the cavity. Surfaces of the fourth trace layer combining with the second dielectric layer, and surfaces of the second trace layer combining with the first dielectric layer, are all roughened to increase the strength of adhesion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.