Semiconductor device having wire studs as vertical interconnect in FO-WLP
US9443797B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | Mar 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a substrate and semiconductor die disposed over a first surface of the substrate. A wire stud is attached to the first surface of the substrate. The wire stud includes a base portion and stem portion. A bonding pad is formed over a second surface of the substrate. An encapsulant is deposited over the substrate, semiconductor die, and wire stud. A portion of the encapsulant is removed by LDA to expose the wire stud. A portion of the encapsulant is removed by LDA to expose the substrate. An interconnect structure is formed over the encapsulant and electrically connected to the wire stud and semiconductor die. A bump is formed over the interconnect structure. A semiconductor package is disposed over the encapsulant and electrically connected to the substrate. A discrete semiconductor device is disposed over the encapsulant and electrically connected to the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.