Semiconductor device having metal layer and method of fabricating same
US9443967B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2015 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | Mar 13, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
A semiconductor device includes a substrate having a first conductivity type, a high-voltage well having a second conductivity type and formed in the substrate, a source well having the first conductivity type and formed in the high-voltage well, a source region formed in the source well, an isolation layer formed above the high-voltage well and spaced apart from the source well, a gate layer formed above the substrate and continuously extending from above an edge portion of the source well to an edge portion of the isolation layer, and a metal layer formed above the substrate and the isolation layer. The metal layer includes a first metal portion overlapping an edge portion of the gate layer and a side portion of the isolation layer, a second metal portion overlapping and conductively contacting the gate layer, and a third metal portion overlapping and conductively contacting the source region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.