Microprocessor device, and method of managing reset events therefor
US9448811B2 · kind B2 · utility
6Cited by
13References
20Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Nov 23, 2011 |
| Grant date | Sep 20, 2016 |
| Priority date | — |
| Expiry date | Mar 28, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor device comprises at least one reset management module. The at least one reset management module is arranged to detect a reset event comprising a first reset level, determine if at least one reset condition has been met upon detection of the reset event comprising the first reset level, and cause a reset of a second reset level upon determining that the at least one reset condition has been met.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.