FinFET devices and methods of forming

US9449975B1 · kind B1 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Kuo-Cheng Ching · Hsinchu, TW
• Chi-Wen Liu · Baoshan, TW

Key dates

• Filing date: Jun 15, 2015
• Grant date: Sep 20, 2016
• Expiry date: Jun 15, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0184

Abstract

In accordance with some embodiments, a device includes first and second p-type transistors. The first transistor includes a first channel region including a first material of a first fin. The first transistor includes first and second epitaxial source/drain regions each in a respective first recess in the first material and on opposite sides of the first channel region. The first transistor includes a first gate stack on the first channel region. The second transistor includes a second channel region including a second material of a second fin. The second material is a different material from the first material. The second transistor includes third and fourth epitaxial source/drain regions each in a respective second recess in the second material and on opposite sides of the second channel region. The second transistor includes a second gate stack on the second channel region.