Ramp and successive approximation register analog to digital conversion methods, systems and apparatus
US9450596B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2011 |
| Grant date | Sep 20, 2016 |
| Priority date | — |
| Expiry date | Mar 17, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Successive approximation register (SAR) and ramp analog to digital conversion (ADC) methods, systems, and apparatus are disclosed. An analog voltage signal may be converted into a multiple bit digital value by generating bits of the multiple bit digital value by performing a SAR conversion on the analog voltage signal, where the bits corresponding to a SAR voltage level, and generating other bits of the multiple bit digital value by performing one or more ramp conversions on the analog voltage signal, the ramp conversion comparing the analog voltage signal to a ramp of voltage levels based on the SAR voltage level. The SAR and ramp ADC can provide multi-sampling using one SAR conversion and multiple ramp conversions. The SAR can set the voltage level of a first ramp of a multiple ramp conversion, which can then be used to preset the voltage level prior to subsequent ramps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.