Patent · US Active

Assembly of integrated circuit chips having an overvoltage protection component

US9453977B2 · kind B2 · utility

0Cited by

4References

13Claims

0Family size

Assignee

STMicroelectronics SA

Inventor

Pascal Fonteneau · Theys, FR

Key dates

Filing date	Apr 28, 2016
Grant date	Sep 27, 2016
Priority date	—
Expiry date	Apr 28, 2036

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/1431
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A device includes integrated circuit chips mounted on one another. At least one component for protecting elements of a first one of the chips is formed in a second one of the chips. Preferably, the chips are of SOI type, the second chip includes an SOI layer having a first thickness sufficient to support the component for protecting elements. The first chip also includes an SOI layer but having a second thickness smaller than the first thickness that is insufficient to support the component for protecting elements. The SOI layer of the second chip may be an optical waveguide layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.