Micro-architecture for eliminating MOV operations
US9454371B2 · kind B2 · utility
6Cited by
4References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2012 |
| Grant date | Sep 27, 2016 |
| Priority date | — |
| Expiry date | May 29, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3858
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system and processor for elimination of move operations include circuits that obtain a computer instruction and bypass execution units in response to determining that the instruction includes a move operation that involves a transfer of data from a logical source register to a logical destination register. Instead of executing the move operation, the transfer of the data is performed by tracking changes in data dependencies of the source and the destination registers, and assigning a physical register associated with the source register to the destination register based on the dependencies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.