3DIC interconnect devices and methods of forming same
US9455158B2 · kind B2 · utility
6Cited by
16References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2014 |
| Grant date | Sep 27, 2016 |
| Priority date | — |
| Expiry date | Sep 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stacked semiconductor device and a method of forming the stacked semiconductor device are provided. A plurality of integrated circuits are bonded to one another to form the stacked semiconductor device. After each bonding step to bond an additional integrated circuit to a stacked semiconductor device formed at the previous bonding step, a plurality of conductive plugs are formed to electrically interconnect the additional integrated circuit to the stacked semiconductor device formed at the previous bonding step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.