Integrated circuit interposer and method of manufacturing the same
US9455193B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2015 |
| Grant date | Sep 27, 2016 |
| Priority date | — |
| Expiry date | Mar 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/157
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided for an interposer for coupling two or more integrated circuit dies to a circuit package. A first integrated circuit portion is disposed on a first location of a single semiconductor substrate. A second integrated circuit portion is disposed on a second location of the single semiconductor substrate, where the second integrated circuit portion is electrically isolated from the first integrated circuit portion along a first axis. The first and second integrated circuit portions are configured to provide an electrical coupling to two or more corresponding top die integrated circuits across a second axis that is perpendicular to the first axis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.