Transistor having a back-barrier layer and method of making the same
US9455341B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2013 |
| Grant date | Sep 27, 2016 |
| Priority date | — |
| Expiry date | Jul 17, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A transistor includes a substrate and a buffer layer on the substrate, wherein the buffer layer comprises p-type dopants. The transistor further includes a channel layer on the buffer layer and a back-barrier layer between a first portion of the channel layer and a second portion of the channel layer. The back-barrier layer has a band gap discontinuity with the channel layer. The transistor further includes an active layer on the second portion of the channel layer, wherein the active layer has a band gap discontinuity with the second portion of the channel layer. The transistor further includes a two dimensional electron gas (2-DEG) in the channel layer adjacent an interface between the channel layer and the active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.