Programmable hardware blocks for time-sharing arithmetic units using memory mapping of periodic functions
US9460007B1 · kind B1 · utility
3Cited by
3References
20Claims
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Key dates
| Filing date | Sep 24, 2014 |
| Grant date | Oct 4, 2016 |
| Priority date | — |
| Expiry date | Jan 14, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus relates generally to time sharing of an arithmetic unit. In such an apparatus, a controller is coupled to provide read pointers and write pointers. A memory block is coupled to receive the read pointers and the write pointers. A selection network is coupled to the memory block and the arithmetic unit. The memory block includes a write-data network, a read-data network, and memory banks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.