Method for fabricating semiconductor devices
US9460935B2 · kind B2 · utility
3Cited by
10References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 31, 2015 |
| Grant date | Oct 4, 2016 |
| Priority date | — |
| Expiry date | Aug 31, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method for fabricating a semiconductor device. The method comprises forming a first etching layer and a second etching layer stacked on a substrate, and forming a recess region by etching the first and second etching layers under plasma generated from an etching gas including a compound. The compound comprises at least one of 1,1,1,2,3,3-hexafluoropropane, 2,2,2-trifluoroethane-1-thiol, 1,1,1,3,3-pentafluoropropane, 1,1,2,2,3-pentafluoropropane and 1,1,2,2-tetrafluoro-1-iodoethane, 2,3,3,3-tetrafluoropropene and 1,1-difluoroethene.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.