Magnetoresistive memory device

US9461240B2 · kind B2 · utility

Assignee

• Kabushiki Kaisha Toshiba · JP

Inventors

• Kazuya SAWADA · Seoul, KR
• Toshihiko Nagase · Sagamihara, JP
• Youngmin EEH · Seongnam-si, KR
• Koji Ueda · Kamakura, JP
• Daisuke Watanabe · Chigasaki, JP
• Makoto Nagamine · Tokyo, JP

Key dates

• Filing date: Jul 30, 2015
• Grant date: Oct 4, 2016
• Expiry date: Jul 30, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B61/22

Abstract

According to one embodiment, a magnetoresistive memory device includes a first magnetic layer, a second magnetic layer, a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, and a third magnetic layer provided on a side of the first or second magnetic layer opposite to the nonmagnetic layer. The third magnetic layer has a multilayer film having an artificial lattice structure, and the third magnetic layer is partly microcrystalline or amorphous.