Spacer layer for embedding semiconductor die
US9462694B2 · kind B2 · utility
0Cited by
5References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2014 |
| Grant date | Oct 4, 2016 |
| Priority date | — |
| Expiry date | Dec 5, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/24273
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device, and a method of its manufacture, are disclosed. The semiconductor device includes a semiconductor die, such as a controller die, mounted on a surface of a substrate. A spacer layer is also mounted to the substrate, with the semiconductor die fitting within an aperture or a notch formed through first and second major opposed surfaces of the spacer layer. Additional semiconductor die, such as flash memory die, may be mounted atop the spacer layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.