Forward error correction synchronization
US9465689B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Nov 20, 2014 |
| Grant date | Oct 11, 2016 |
| Priority date | — |
| Expiry date | Mar 5, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/03
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques for forward error correction synchronization are described herein. The techniques include receiving a bit stream over a transmission link and determining a starting location of a first code word within the bit stream. Determining the starting location of the first code word includes identifying an error correction block associated with a previously received second code word, and designating a bit subsequent to the error correction block as the starting location of the first code word.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.