DMA engine with STLB prefetch capabilities and tethered prefetching
US9465749B2 · kind B2 · utility
1Cited by
26References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2013 |
| Grant date | Oct 11, 2016 |
| Priority date | — |
| Expiry date | Sep 1, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/681
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system with a prefetch address generator coupled to a system translation look-aside buffer that comprises a translation cache. Prefetch requests are sent for page address translations for predicted future normal requests. Prefetch requests are filtered to only be issued for address translations that are unlikely to be in the translation cache. Pending prefetch requests are limited to a configurable or programmable number. Such a system is simulated from a hardware description language representation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.