Non-volatile memory and method with adaptive logical groups
US9466383B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2013 |
| Grant date | Oct 11, 2016 |
| Priority date | — |
| Expiry date | Aug 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory is organized into blocks as erase units and physical pages as read/write units. A host addresses data by logical pages, which are storable in corresponding physical pages. Groups of logical pages may be further aggregated into logical groups as addressing units. The memory writes host data in either first or second write streams, writing to respective blocks either logical-group by logical-group or logical-page by logical-page in order to reduce the size of logical-to-physical-address maps that are cached in a controller random-access memory (RAM). A group-level map may be used to track logical groups. A page-level map may be used to track logical pages. Only one block at a time needs be open in the second stream to accept logical pages from multiple logical groups that are active. Garbage collection is performed on the blocks from each write stream independently without data copying between the two streams.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.