Optimizing computer hardware usage in a computing system that includes a plurality of populated central processing unit (‘CPU’) sockets
US9471433B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2014 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Aug 23, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/008
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Optimizing computer hardware usage in a computing system that includes a plurality of populated central processing unit (‘CPU’) sockets, including: determining, by a socket configuration module, a number of CPUs to be utilized during operation of the computing system; determining, by the socket configuration module, error characteristics associated with each available CPU, wherein the error characteristics associated with each available CPU include error information for computing devices that are coupled to one or more of the available CPUs; and selecting, by the socket configuration module in dependence upon the error characteristics associated with each available CPU and a predetermined error tolerance policy, a target CPU to utilize as a boot CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.