Systems and methods for secure boot ROM patch
US9471785B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2013 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Sep 5, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/572
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system includes a boot read only memory (ROM) configured to store boot code; one time programmable (OTP) storage circuitry configured to store patch instructions; a random access memory (RAM); and a processor coupled to the boot ROM, the OTP storage circuitry, and the RAM. The processor is configured to: in response to a reset of the data processing system, copy one or more patch instructions from the OTP storage circuitry into the RAM, and during execution of the boot code, execute a patch instruction from the RAM in place of a boot instruction of the boot code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.