Method for producing a pattern in an integrated circuit and corresponding integrated circuit
US9472413B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2014 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Sep 25, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3085
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
At least one projecting block is formed in an element. The projecting block is then covered with a first cover layer so as to form a concave ridge self-aligned with the projecting block and having its concavity face towards the projecting block. A first trench is then formed in the ridge in a manner that is self-aligned with both the ridge and the projecting block. The first trench extends to a depth which reaches the projecting block. The projecting block is etched using the ridge and first trench as an etching mask to form a second trench in the projecting block that is self-aligned with the first trench. A pattern is thus produced by the second trench and unetched parts of the projecting block which delimit the second trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.