Nanowire CMOS structure and formation methods
US9472468B2 · kind B2 · utility
9Cited by
0References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 11, 2014 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Dec 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes growing a nanowire from a substrate, forming a sacrificial layer surrounding the nanowire, removing the nanowire from the sacrificial layer to form an opening in the sacrificial layer, and growing a replacement semiconductor nanowire in the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.